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  1/8 may 2002 ste53NC50 n-channel 500v - 0.070 w - 53a isotop powermesh?ii mosfet (1) i sd 53a, di/dt 100 a/ m s, v dd 24v, tj t jmax n typical r ds (on) = 0.07 w n extremely high dv/dt capability n 100% avalanche tested n new high voltage benchmark n gate charge minimized description the powermesh ? ii is the evolution of the first generation of mesh overlay ?. the layout re- finements introduced greatly improve the ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness. applications n high current, high speed switching n swith mode power supplies (smps) n dc-ac converters for welding equipment and uninterruptible power supplies and motor driver absolute maximum ratings (?)pulse width limited by safe operating area type v dss r ds(on) i d ste53NC50 500v < 0.08 w 53 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 500 v v dgr drain-gate voltage (r gs = 20 k w ) 500 v v gs gate- source voltage 30 v i d drain current (continuos) at t c = 25c 53 a i d drain current (continuos) at t c = 100c 33 a i dm ( l ) drain current (pulsed) 212 a p tot total dissipation at t c = 25c 460 w derating factor 3.68 w/c dv/dt (1) peak diode recovery voltage slope 3 v/ns v iso insulation winthstand voltage (ac-rms) 2500 v t stg storage temperature C 65 to 150 c t j max. operating junction temperature 150 c isotop internal schematic diagram
ste53NC50 2/8 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. rthj-case thermal resistance junction-case max 0.272 c/w rthc-h thermal resistance case-heatsink with conductive grease applied 0.05 c/w symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 53 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 1043 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 10 a v ds = max rating, t c = 125 c 100 a i gss gate-body leakage current (v ds = 0) v gs = 30v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 234v r ds(on) static drain-source on resistance v gs = 10v, i d = 27a 0.07 0.08 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 15 a 42 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 11.2 nf c oss output capacitance 1350 pf c rss reverse transfer capacitance 115 pf
3/8 ste53NC50 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 250v, i d = 26.5a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 46 ns t r rise time 70 ns q g total gate charge v dd = 400v, i d = 53a, v gs = 10v 310 434 nc q gs gate-source charge 46 nc q gd gate-drain charge 150 nc symbol parameter test conditions min. typ. max. unit t r(voff) off-voltage rise time v dd = 400v, i d = 53a, r g = 4.7 w, v gs = 10v (see test circuit, figure 5) 45 ns t f fall time 38 ns t c cross-over time 85 ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 53 a i sdm (2) source-drain current (pulsed) 212 a v sd (1) forward on voltage i sd = 53a, v gs = 0 1.6 v t rr reverse recovery time i sd = 53a, di/dt = 100a/s, v dd = 70v, t j = 150c (see test circuit, figure 5) 760 ns q rr reverse recovery charge 17.86 c i rrm reverse recovery current 47 a safe operating area thermal impedence
ste53NC50 4/8 gate charge vs gate-source voltage transconductance output characteristics capacitance variations static drain-source on resistance transfer characteristics
5/8 ste53NC50 source-drain diode forward characteristics normalized on resistance vs temperature normalized gate thereshold voltage vs temp.
ste53NC50 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/8 ste53NC50 dim. mm inch min. typ. max. min. typ. max. a 11.8 12.2 0.466 0.480 b 8.9 9.1 0.350 0.358 c 1.95 2.05 0.076 0.080 d 0.75 0.85 0.029 0.033 e 12.6 12.8 0.496 0.503 f 25.15 25.5 0.990 1.003 g 31.5 31.7 1.240 1.248 h4 0.157 j 4.1 4.3 0.161 0.169 k 14.9 15.1 0.586 0.594 l 30.1 30.3 1.185 1.193 m 37.8 38.2 1.488 1.503 n4 0.157 o 7.8 8.2 0.307 0.322 b e h o n j k l m f a c g d isotop mechanical data
ste53NC50 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com


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